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Nanosynaptic ICs revealed by IBM

IBM has revealed two new artifical brain chips “evolved” from ways that a rat thinks, a cat reacts and a human is wired. Press release

Reverse engineering the brain using nanoelectronic circuitry has the potential for a million times faster processing than a normal brain

but also a million times better energy efficiency than a normal CPU.

The reason we have not engineered our computing systems this way before is that we have not been able too analyze, understand and model synaptic systems in sufficient detail until only a few years ago. For a good introduction to the reverse engineering of synaptic systems, see the excellent talk by Dharmendra Modha, manager of cognitive computing at the IBM Almaden Research Center.

By switching from traditional binary-logic to these massive-synaptic systems, the design criteria for nanoelectronic circuitry changes dramatically: Instead of requiring that every single cell in the IC fabric behaves exactly the same, it is enough that it is possible to have some paths through the fabric that can generate sufficient signal strength compared to the background noise from all other paths. Any design that generate a stable nonlinear response from the selective summation of many input signals will work, as long as each of its inputs includes a memory of the response it generated when it was last active. This means these nanosynapses can be made much smaller than traditional nanologic circuits, and that manufacturing processes can be much more simple and innacurate. In fact it will be more robust to have manufactoring processes and/or circuit designs that are generating a fairly large variation because that makes the system more adaptive!

Quflow has researched the implications of nanosynaptic systems on the roadmap for nanoelectronics as set forth by ITRS (http://www.itrs.net/). The result of the analysis will be published later this year.

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IC efficiency and speed when quantization matters

Un-intentional effects of electron wave and charge quantization are causing big problems in current integrated circuit (IC) manufacturing as feature sizes get below 50 nm towards the sub-10nm range. It is now high time to make use of the quantization effects instead of fighting them. The basic CMOS transistors used inside most ICs today are getting more and more efficient but also more weak and process-sensitive as their size is reduced. However when the transistor size and bias voltage is so small that barely a single electronic wave mode can propagate (quantum point contacts) Koswatta et al. (http://arxiv.org/ftp/arxiv/papers/1011/1011.5241.pdf) recently showed such tunneling behavior can enhance both the energy efficiency and transistor strength (and therefore also process stability and transistor speed) compared to classical transistor models. Good news for both quantum engineers, IC manufacturers and device users!

Fig. 4. Simulated energy-position resolved current spectrum (log scale) of the 1D BG-TFET (EG-eff = -100meV) with dissipative transport (CNT phonon modes) at VDS = 0.4V and; (a) VGS = 0.4V (above-threshold), and (b) VGS = -0.05V (subthreshold). Phonon absorption-assisted tunneling dominates the TFET off-state leakage. Carrier thermalization in the drain by phonon emission is also observed.
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Examples Research

Design optimization of coupled systems

Quflow has experience from training and optimization of neural networks for human factor modeling, with surprisingly good results (http://quflow.com/publications). Recently, Fang et al. (http://tr.ietejournals.org/text.asp?2010/27/4/336/64601) listed how similar Quantum Particle Swarm Optimization (QPSO) methods has been used to successfully optimize global system performance in many engineering disciplines.

Nowadays, optimization is often integrated and relatively easy to use in most design tools. Designers can therefore focus more on analyzing which parameters matter most and let the tool do its job finding a global optimum configuration. This works well within each specific design discipline, however a complete product requires optimization across multiple disciplines simultaneously, and few tools, engineers and application examples exist for this. It would be interesting to see how such products would look like – probably much more organic and chaotic than we are used to, as in the 100% computer-generated WiFi antenna pattern below (from the last reference below) which works very well but raises questions on how it actually works. Optimization is fun, creative and easily leads to completely new ideas and understandings – very much Quflow.

Fragmented WiFi antenna
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Electron boxing – rules of the game

Shin et al. (http://arxiv.org/ftp/arxiv/papers/1001/1001.3724.pdf) has obtained a very interesting switching diagram for a nearly isolated CMOS transistor close to pinch-out:

Figure 2c: Stability plot at room temperature; each diamond corresponds to a stable charge configuration state with fixed electron occupancy N.

The combined effects from multiple quantizations are causing big problems with current device technologies due to chaotic behavior (unintentional quantum dots and quantum point contacts) within the traditional CMOS circuitry. But as we go even further down in size, the quantization will ultimately lead to enhanced stability and device efficiency – if used correctly as in the single-electron transistor Shen et al measured here.

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Dividing risks = multiplying opportunities

Baldwin & Woodard (http://www.hbs.edu/research/pdf/09-034.pdf) argue that the fundamental architecture behind all platforms is the partitioning into a set of “core” components with low variety and a complementary set of “peripheral” components with high variety. This achieves economies of scale while reducing the cost of creating a wide variety of complementary components.

Quflow has experience from products that are developed as monolithic designs as well as products that are designed as more generic platforms. The differences are very big. Monolithic designs may appear mature in the beginning but has a jittery quality progress and are difficult to finish, while the partitioned designs always reach and exceed expectations at a fast and steady pace.
Example: The monolithic part to the left in the illustration below did not reach desired quality and project cost targets due to a very jittery quality progress. To the right is the same subsystem in a later product where the risks were considered higher and design responsibilities were more divided.
Monolithic compared to partitioned system
As could have been expected, the quality in the latter product grew very quickly due to proper hardware partitioning and exceeded all expectations at a fraction of the project cost compared to the monolithic design. In fact it was so agile that one of the sub-teams actually took the opportunity to configure in a chipset from the next product generation, contributing to the success of later products as well!
Product quality growth

Usually the argument for not partitioning a product by its design risks is that the partitioning itself introduces risk, cost and size, but nowadays when interfacing components can be very small, cheap and generic, it seldom matters even if partitioning is kept also in the final product. Such products are also very easy to use as platform for further developments and new opportunities. All really successful products create their own unique ecosphere for further developments, and Quflow does systems engineering that makes it very easy to achieve.

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When scientists meet engineers

Most innovations “just happens” when the conditions are right, and they in turn create new conditions that enable more innovations. It’s like catalysis – when barriers for interactions are removed, they happen, just because they can. Telephony, for example, enabled many people to share thoughts and ideas in real-time, catalyzing the industrial revolution. Internet enabled interactions between any computers, catalyzing the IT revolution. Nanotechnology is now enabling interactions between any devices and the environment, catalyzing things we don’t yet know will happen. Quflow wishes to take part in this development by bringing nano-researchers and engineers together around industrialization projects for mobile devices. Below are glimpses of such a project that currently is looking for industrial partner(s) willing to get involved:

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Technologies for sustainable devices

Have you experienced that the first software updates make the device better, but after some year it starts to get more and more sluggish and drains the battery? It has started to assume newer hardware exist and need to emulate it with software instead and that can be very inefficient.

Turning your device to waste is not what the app developer want, and is not good for the environment either. If the hardware chips inside the device were re-configurable instead of frozen to an old design, it would not get outdated as fast. Alternatively, if the complete device was manufactured with very low environmental impact and using decomposable parts, it would not matter as much when it does get outdated. But it would still need to be small, cheap, fast and power efficient – otherwise the product won’t sell. With latest nanoelectronics and material technologies this is finally becoming feasible! Examples of new research to consider in technology roadmaps:

Joakim Pettersson, the founder of Quflow, was doing early nanoelectronics research 15 years ago and are working with experts on nanodevices that are industrialized now. Quflow can help companies analyze and industrialize in this new era of extremely power efficient, sustainable and small devices.

2D honey-comb pattern of carbon and its electron structure
Graphene and its 2D electronic band structure (from http://www.als.lbl.gov/als/science/sci_archive/154graphene.html)
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Examples Research

Receiving satellite signals

Watson et al. (http://plan.geomatics.ucalgary.ca/papers/watson%20et%20al_ion%20navigation_winter06.pdf) analyzed what matters most when receiving GPS signals in-door. The GPS system was not designed for this but with good antennas, modern receivers and long integration times it is possible. Their graph below shows signal strengths from different satellites plotted on a hemisphere circle. The result indicates that reflections within the building are not picked up – only the attenuated “line-of-sight” direction reaches the antenna. Another interesting conclusion from their study is that besides an antenna that picks up signals from the horizon well, it is only the quality of the clock signal that matters (assuming the receive chain is a typically good one of course).

Fig. 13–Mean Tube Fades vs. Building Geometry
Fig. 3–Tube Antenna Location

The Sony Ericsson Equinox phone (http://www.sonyericsson.com/cws/support/phones/topic/locationservices/equinox?cc=us&lc=en) is a good example that integrated antenna and clocking well. It obtained the best ever GPS availability when operators tested it in field, and was implemented according to new A-GPS integration guidelines (authored by Joakim Pettersson, founder of Quflow) that in detail explains how to stabilize antenna and clocking also in very small mechanics.

Sony Ericsson Equinox